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19-3705; Rev 0; 5/05
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs
General Description
The MAX8737 dual high-power linear regulator controllers use external n-channel MOSFETs to generate two independent low-voltage supplies for notebook computers. The MAX8737 delivers low output voltages from 0.5V to 2.5V (5mV no-load accuracy). The external components allow scalable current design with loads up to 5A with excellent load regulation (1%). The regulator operates from a low input voltage, which also reduces the power dissipation in the external n-channel MOSFET. The controller powers the external MOSFET gate driver from the standard 5V system supply. The MAX8737 includes current and thermal limits to prevent damage to the linear regulator. The MAX8737 uses an external resistive divider to fold back the current limit, reducing the overall power dissipation. The MAX8737 uses an external resistive-divider in series with the current-sense input (CS_), providing foldback current-limit protection, and effectively reducing the short-circuit power dissipation. An output undervoltage timeout is available for low-cost applications that omit the current-sense resistor. The output undervoltage (UVP) timing depends on the magnitude of the voltage at VOUT. The UVP detects and shuts down the LDO if the output voltage drops out of regulation. The controller uses an adjustable reference input (REFIN_) to set the nominal output voltage (VOUT_), which minimizes the cost and makes the stability independent of the output voltage. Each linear regulator features an adjustable soft-start function, and generates a delayed power-good (PGOOD) signal that signals when the linear regulator is in regulation. The MAX8737 is a low-cost solution requiring few external components and is available in a small, 4mm x 4mm, 16-pin thin QFN package. Low-Cost Dual Linear Regulators Output Voltage Accuracy 5mV Independent 0.5V to 2.5V Reference Inputs Foldback Current-Limit Protection Output Undervoltage-Lockout Protection Thermal Limit (Internal Sensor) 1.0V to 5.5V Input Supply Voltage (External FET Drain) 5V Bias Supply Voltage Independent Power-Good Open-Drain Outputs Independent Enable Inputs Soft-Shutdown Output Discharge Low Supply Current (0.5mA) 5A (max) Shutdown Supply Current
Features
MAX8737
Ordering Information
PART MAX8737ETE TEMP RANGE PIN-PACKAGE -40C to +85C 16 Thin QFN-EP* 4mm x 4mm
MAX8737ETE+ -40C to +85C 16 Thin QFN-EP* 4mm x 4mm
*EP = Exposed pad. +Denotes lead-free packaging.
Pin Configuration
TOP VIEW
REFIN2 9 OUT2 10
N.C. 12
Applications
Notebook and Desktop Computers Point-of-Load Regulators VMCH and VCCP CPU Supplies Low-Voltage Bias Supplies Servers
DRV1 16 N.C. 14 DRV2 13
11
CS2
8 7
EN1 EN2 PGOOD1 PGOOD2
MAX8737
GND 15 6 5 1 VCC 2 CS1 3 OUT1 4 REFIN1
4mm x 4mm TQFN
________________________________________________________________ Maxim Integrated Products
1
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737
ABSOLUTE MAXIMUM RATINGS
VCC to GND ..............................................................-0.3V to +6V OUT1, OUT2 to GND................................................-0.3V to +6V REFIN1, REFIN2, PGOOD1, PGOOD2, EN1, EN2 to GND..........................................................-0.3V to +6V DRV1, DRV2, CS1, CS2 to GND.................-0.3V to (VCC + 0.3V) Continuous Power Dissipation (TA = +70C) 16-Pin 4mm x 4mm Thin QFN (derated 25mW/C above +70C).............................................................2000mW Operating Temperature Range MAX8737ETE ...................................................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 5V, EN_ = CS_ = VCC, VREFIN = 1.0V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER Supply Voltage Range VCC Undervoltage Lockout Threshold VCC Quiescent Supply Current VCC Shutdown Supply Current REFIN to OUT Offset Voltage OUT_ Input Bias Current DRIVERS DRV_ Output Voltage Swing (Note 1) DRV_ Maximum Sourcing Current DRV_ Maximum Sinking Current OUT_ to DRV_ Transconductance (Large Signal) DRV_ Power-Supply Rejection Ratio DRV_ Soft-Start Charging Current REFERENCE INPUT REFIN_ Voltage Range REFIN_ Input Bias Current FAULT PROTECTION Thermal Shutdown Threshold Current-Limit Threshold CS_ Input Current Linear Regulator UVP Threshold (Slow) UVP(SLOW) With respect to VREFIN; CS_ = VCC TSHDN VILIM Hysteresis = 20C VCS_ - VOUT_ TA = 0C to +85C TA = +85C 7 7.5 -1 72 80 +125 10 10 13 12.5 +1 88 C mV A % VREFIN_ IREFIN_ VCC = 4.75V to 5.5V VREFIN_ = 0 to 2.5V 0.5 -100 -10 2.5 +100 V nA ISOFT GMDRV 10Hz < f < 10kHz, IDRV = 1mA, CDRV = 10nF 40 Output high; VOUT_ = VREFIN_ - 25mV, ILOAD = 1mA Output low; VOUT_ = VREFIN_ + 25mV, ILOAD = 1mA VOUT_ = VREFIN_ - 25mV; VDRV = 3V VOUT_ = VREFIN_ + 25mV; VDRV = 3V 6 6 VCC 0.3 VCC 0.05 V 0.03 14 14 0.8 -80 170 400 0.3 mA mA S dB A VOUT_ IOUT_ ICC SYMBOL VCC Rising edge, 200mV hysteresis (typ) EN1 = EN2 = VCC EN1 = EN2 = GND -5 -1 CONDITIONS MIN 4.75 4.1 4.35 0.5 0.1 TYP MAX 5.50 4.6 1 5 +5 +1 UNITS V V mA A mV A
2
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 5V, EN_ = CS_ = VCC, VREFIN = 1.0V, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
MAX8737
PARAMETER Linear Regulator UVP Threshold (Fast) Slow Short-Circuit Timer Duration Fast Short-Circuit Timer Duration Discharge-Mode On-Resistance OUT_ Pin INPUTS AND OUTPUTS EN_ Input Low Level EN_ Input High Level Enable Leakage Current Power-Good Trip Threshold (Lower) Power-Good Startup Delay Power-Good Propagation Delay Power-Good Output Low Voltage Power Good Leakage Current
SYMBOL UVP(FAST)
CONDITIONS With respect to VREFIN; CS_ = VCC
MIN 54
TYP 60 75 5 10
MAX 66
UNITS % s s
tUVP(SLOW) With respect to VREFIN; CS_ = VCC tUVP(FAST) ROUT With respect to VREFIN; CS_ = VCC
0.6 Rising edge, 200mV (typ) hysteresis With respect to error comparator threshold, hysteresis = 4% (falling edge) 1.6 -1 -15 -12 2 tPGOOD OUT_ forced 2% beyond PGOOD_ trip threshold ISINK = 4mA I GOO VOUT_ = 1.0V (PGOOD_ high impedance), 1 1 0.3 +1 -9
V V A % ms s V A
ELECTRICAL CHARACTERISTICS
(VCC = 5V, EN_ = CS_ = VCC, VREFIN = 1.0V, TA = -40C to +85C, unless otherwise noted.) (Note 2)
PARAMETER Supply Voltage Range VCC Undervoltage Lockout Threshold VCC Quiescent Supply Current VCC Shutdown Supply Current REFIN to OUT Offset Voltage DRIVERS DRV_ Output Voltage Swing (Note 1) DRV_ Maximum Sourcing Current DRV_ Maximum Sinking Current DRV_ Soft-Start Charging Current ISOFT Output high; VOUT_ = VREFIN_ - 25mV; ILOAD = 1mA Output low; VOUT_ = VREFIN_ + 25mV: ILOAD = 1mA VOUT_ = VREFIN_ - 25mV; VDRV = 3V VOUT_ = VREFIN_ + 25mV; VDRV = 3V 3.5 3.5 40 400 VCC 0.3 V 0.3 mA mA A VOUT_ ICC SYMBOL VCC Rising edge 200mV hysteresis (typ) EN1 = EN2 = VCC EN1 = EN2 = GND -7 CONDITIONS MIN 4.75 4.1 TYP MAX 5.50 4.6 1.5 5 +7 UNITS V V mA A mV
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 5V, EN_ = CS_ = VCC, VREFIN = 1.0V, TA = -40C to +85C, unless otherwise noted.) (Note 2)
PARAMETER REFERENCE INPUT REFIN_ Voltage Range FAULT PROTECTION Current-Limit Threshold Linear Regulator UVP Threshold (Slow) Linear Regulator UVP Threshold (Fast) INPUTS AND OUTPUTS EN_ Input Low Level EN_ Input High Level Power-Good Trip Threshold (Lower) Power-Good Output Low Voltage With respect to error comparator threshold, hysteresis = 4% (falling edge) ISINK = 4mA 1.6 -15 -9 0.3 0.6 V V % V VILIM VCS_ - VOUT_ 6.5 72 54 13.5 88 66 mV % % VREFIN_ VCC = 4.75V to 5.5V 0.5 2.5 V SYMBOL CONDITIONS MIN TYP MAX UNITS
UVP(SLOW) With respect to VREFIN; CS_ = VCC UVP(FAST) With respect to VREFIN; CS_ = VCC
Note 1: Low threshold n-channel MOSFET is required for 2.5V (2%) output. Note 2: Specifications to -40C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 1, TA = +25C, unless otherwise noted.)
OUTPUT-VOLTAGE DEVIATION vs. LOAD CURRENT
MAX8737 toc01
FOLDBACK CURRENT LIMIT vs. OUTPUT VOLTAGE
2.8 2.4 CURRENT LIMIT (A) 2.0 1.6 1.2 0.8
MAX8737 toc02
SOFT-START (EN RISING EDGE)
MAX8737 toc03
5 OUTPUT-VOLTAGE DEVIATION (mV) 4 3 2 1 0 -1 -2 -3 -4 -5 0 0.5 1.0 LOAD CURRENT (A) 1.5 VOUT = 1.5V
3.2
5V 0 3V
A
B 0 1.5V C 0 5V 0 0 0.5 1.0 1.5 A. EN1, 5V/div B. DRV1, 2V/div NO LOAD 1ms/div C. LDO1 OUTPUT, 1V/div D. PGOOD1, 5V/div D
0.4 0 2.0 OUTPUT VOLTAGE (V)
4
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737
Typical Operating Characteristics (continued)
(Circuit of Figure 1, TA = +25C, unless otherwise noted.)
SOFT-STOP (EN FALLING EDGE)
MAX8737 toc04
SOFT-START (UVLO RISING EDGE)
MAX8737 toc05
SOFT-STOP (UVLO FALLING EDGE)
MAX8737 toc06
5V 0 3V
A
5V 0 3V
A
5V 0 3V
A
B 0 1.5V C 0 5V 0 100s/div A. EN1, 5V/div B. DRV1, 2V/div NO LOAD C. LDO1 OUTPUT, 1V/div D. PGOOD1, 5V/div D 0 5V 0 2ms/div A. 5V BIAS (VCC), 5V/div B. DRV1, 2V/div NO LOAD, EN = VCC 0 1.5V
B 0 1.5V C 0 5V D 0 2ms/div A. 5V BIAS (VCC), 5V/div B. DRV1, 2V/div NO LOAD, EN = VCC
B
C
D
C. LDO1 OUTPUT, 1V/div D. PGOOD1, 5V/div
C. LDO1 OUTPUT, 1V/div D. PGOOD1, 5V/div
LOAD TRANSIENT (0.1A TO 2.1A)
MAX8737 toc07
LOAD TRANSIENT (NO LOAD TO 2A)
MAX8737 toc08
LOAD TRANSIENT (NO LOAD TO 2A)
MAX8737 toc09
0 2.1A
A
0 2A 0 3.2V 2.7V 1.7V
A
0 2A
A
B 0.1A 3.2V 2.8V 1.51V 1.50V 1.49V 10s/div A. CONTROL SIGNAL C. DRV1, 500mV/div B. LOAD CURRENT, 2A/div D. LDO1 OUTPUT VOLTAGE, 10mV/div D C
B
B 0
C
3.2V 2.7V
C
1.50V 1.45V 10s/div
D
1.50V 1.45V 2s/div
D
A. CONTROL SIGNAL C. DRV1, 1V/div B. LOAD CURRENT, 2A/div D. LDO1 OUTPUT VOLTAGE, 50mV/div
A. CONTROL SIGNAL C. DRV1, 1V/div B. LOAD CURRENT, 2A/div D. LDO1 OUTPUT VOLTAGE, 50mV/div
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737
Typical Operating Characteristics (continued)
(Circuit of Figure 1, TA = +25C, unless otherwise noted.)
FOLDBACK CURRENT LIMIT (SHORT-CIRCUIT RESPONSE)
10V 0 SAMPLE PERCENTAGE (%) 40 3V B 1.5V 20A 0 1.50V 0 5V 0 2s/div A. GATE OF FET LOAD, 10V/div D. LD01 OUTPUT B. DRV1, 1V/div VOLTAGE, 2V/div C. MOSFET CURRENT, 20A/div E. PGOOD1, 5V/div D E 0 -5 -3 0 3 5 OUTPUT OFFSET VOLTAGE (mV) C
MAX8737 toc10
OUTPUT OFFSET VOLTAGE DISTRIBUTION
A OUT1 OUT2
MAX8737 toc11
CURRENT-LIMIT THRESHOLD DISTRIBUTION
OUT1 OUT2 SAMPLE PERCENTAGE (%) 40 SAMPLE SIZE = 150
MAX8737 toc12
50 SAMPLE SIZE = 150
50
30
30
20
20
10
10
0 7.5 8.8 10.0 11.3 12.5 CURRENT LIMIT (mV)
DRV TRANSCONDUCTANCE DISTRIBUTION
MAX8737 toc13
OUTPUT-VOLTAGE DEVIATION vs. TEMPERATURE
MAX8737 toc14
GAIN AND PHASE (OUT1)
MAX8737 toc15
50 OUT1 OUT2 SAMPLE PERCENTAGE (%) 40 SAMPLE SIZE = 150
3 OUTPUT-VOLTAGE DEVIATION (mV) 2 1 0 -1 -2 -3
60 20 0 -20 GAIN (dB) 0.01 0.1 1 10 FREQUENCY (MHz) 1.5V OUTPUT, 1A LOAD, COUT = (1) 10F 1206 16V CERAMIC PHASE () 40
30
20
180 90 0 -90 -180 -40 -15 10 35 60 85 0.001 TEMPERATURE (C)
10
0 0.5 0.8 1.0 1.3 1.5 TRANSCONDUCTANCE (S)
GAIN AND PHASE (OUT2)
MAX8737 toc16
60 20 0 -20 GAIN (dB) 0.01 0.1 1 10 FREQUENCY (MHz) 1.05V OUTPUT, 2A LOAD, COUT = (1) 22F 1206 6V CERAMIC PHASE () 40
180 90 0 -90 -180 0.001
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs
Pin Description
PIN 1 NAME VCC FUNCTION Analog and Driver Supply Input. Connect to the system supply voltage (+5.0V). Bypass VCC to analog ground with a 1F or greater ceramic capacitor. Positive Current-Sense Input for LDO1. To enable (foldback) current limit, connect CS1 to the positive terminal of the current-sense element as shown in Figure 1. The MAX8737 driver reduces the gate voltage when the 10mV (typ) current-limit threshold is exceeded. When CS1 is connected to VCC, the MAX8737 disables the current-limit protection and enables the output undervoltage protection (see the UVP Short-Circuit Protection section). Output Feedback-Sense, Negative Current-Sense, and Discharge Input for LDO1. Connect directly to the linear regulator output. When LDO1 is disabled, OUT1 is discharged through an internal 10 FET to GND. External Reference Input for LDO1. REFIN1 sets the main output regulation voltage (VOUT1 = VREFIN1). Open-Drain Power-Good Output for LDO2. PGOOD2 is low when the output voltage is more than 12% (typ) below the normal regulation point, during soft-start, and in shutdown. Approximately 2ms (typ) after OUT2 reaches the regulation voltage (REFIN2), PGOOD2 becomes high impedance as long as the output remains in regulation. Open-Drain Power-Good Output for LDO1. PGOOD1 is low when the output voltage is more than 12% (typ) below the normal regulation point, during soft-start, and in shutdown. Approximately 2ms (typ) after OUT1 reaches the regulation voltage (REFIN1), PGOOD1 becomes high impedance as long as the output remains in regulation. Enable Input for LDO2. Connect EN2 to Vcc for always ON. When EN2 is pulled low, the linear regulator shuts down and pulls the output to ground. Enable Input for LDO1. Connect EN1 to Vcc for always ON. When EN1 is pulled low, the linear regulator shuts down and pulls the output to ground. External Reference Input for the Secondary Regulator (LDO2). REFIN2 sets the main output regulation voltage (VOUT2 = VREFIN2). Output Sense, Negative Current-Sense Input, and Discharge Input for the Secondary Regulator (LDO2). Connect directly to the linear regulator output. When the LDO2 is disabled, OUT2 is discharged through an internal 10 FET to GND. Positive Current-Sense Input for LDO2. To enable (foldback) current limit, connect CS2 to the positive terminal of the current-sense element as shown in Figure 1. The MAX8737 driver reduces the gate voltage when the 10mV (typ) current-limit threshold is exceeded. When CS2 is connected to VCC, the MAX8737 disables the current-limit protection and enables the output undervoltage protection (see the UVP Short-Circuit Protection section). Not Internally Connected External N-Channel Gate Drive for LDO2 Ground. Connect the thin QFN backside pad to GND. External N-Channel Gate Drive for LDO1 Exposed Pad. Connect the thin QFN backside pad to GND.
MAX8737 MAX8737
2
CS1
3 4 5
OUT1 REFIN1 PGOOD2
6
PGOOD1
7 8 9
EN2 EN1 REFIN2
10
OUT2
11
CS2
12, 14 13 15 16 --
N.C. DRV2 GND DRV1 EP
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737
Detailed Description
The MAX8737 is a dual, low-dropout, external n-channel linear regulator controller for low-voltage notebook computer power supplies. The linear regulator provides a 0.5V to 2.5V (5mV no-load) output for powering the low-voltage supplies to desktop and notebook CPU chipsets (VCCP and VCC_MCH). The regulator operates from low input voltage, which also reduces the power dissipation in the external n-channel MOSFET. The controller powers the external MOSFET gate driver from the standard 5V system supply. The controller features independent enable inputs (EN_), PGOOD outputs (PGOOD_), input undervoltage lockout (UVLO), and output undervoltage protection (UVP). The controller uses an adjustable reference input (REFIN_) to set the nominal output voltage (VOUT), which minimizes the cost and makes the stability independent of the output voltage. An output UVP timing depends on the magnitude of the voltage at VOUT. The UVP detects and shuts down the LDO if the output voltage drops below the nominal output voltage (VREFIN). Each linear regulator features an adjustable soft-start function, and generates a delayed PGOOD signal that signals when the linear regulator is in regulation. The MAX8737 uses an external resistor-divider in series with the current-sense input (CS_), providing foldback current-limit protection, and effectively reducing the short-circuit power dissipation. The MAX8737 is available in a thin QFN package to reduce the thermal impedance, and improve the thermal coupling between the controller and the external MOSFETs.
Soft-Start
When the LDO is activated, the respective DRV_ is pulled up from GND with a typical soft-start current of 170A. The soft-start current limits the output voltage slew rate and also limits the initial current spike through the external n-channel MOSFET. The slew rate is also limited by the compensation capacitance used at the DRV_ pin. The maximum drain current during startup is the ratio of COUT to CCOMP, multiplied by the soft-start current ISOFT of 170A (typ).
Enable and Power Good
The MAX8737 has independent enable control inputs (EN1, EN2). Drive EN1 high to enable output 1. Drive EN2 high to enable output 2. When EN_ is driven low, the corresponding DRV_ and PGOOD_ pins are pulled to GND, and the output is discharged through a 10 switch. There are two independent PGOOD_ outputs indicating the supply status. PGOOD_ is pulled high 2ms after the controller is enabled (EN_ is pulled high and V CC exceeds its UVLO threshold), and the output is in regulation. If either output is out of regulation, the respective PGOOD_ goes low immediately. The MAX8737 pulls PGOOD_ low if the output voltage drops below the lower trip threshold of -12% (typ) or when VCC is in UVLO or when EN_ is pulled low.
Soft-Stop
The MAX8737 enables a soft-stop function that discharges the output through an internal 10 switch when EN_ is driven low or VCC is in UVLO. The discharge time of the output depends on the output capacitance, output load, and the exact resistance of the internal discharge switch. To slow down the discharge rate, add resistance in series with the OUT_ pin.
REFIN Input
The low-cost linear regulator uses an adjustable reference input (REFIN_) to set the nominal output voltage, which minimizes cost and simplifies the stability--the stability calculation is independent of VOUT. The output voltage accuracy depends on the accuracy of the source generating the REFIN voltage. Multiple accurate references are typically available elsewhere in the system (such as the switching regulator providing the lowvoltage input supply). If lower output accuracy is acceptable, divide down and filter another regulated output voltage supply. To set output voltage, select R2 = 100k and select R1 using the following formula: V R1 = REF - 1 R2 VREFIN _
5.0V Bias Supply (VCC)
The linear regulator operates with very low input voltages. VIN may be as low as 1.2V, so a secondary 5V supply is required to provide sufficient bias to the gate drivers. Locally decouple the V CC input with 1F or greater of ceramic capacitance.
Current Limit
The MAX8737 features a current limit that monitors the voltage across the current-sense resistor, which limits VCS_ - VOUT_ to 10mV (typ). However, in case of a short-circuit condition, the power dissipation across the external FET will be extremely high. To protect the external FET, the MAX8737 uses an external resistive divider (see Figure 1) to fold back the current limit, reducing the overall power dissipation. The foldback
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737
5V BIAS SUPPLY C1 1.0F R6A 100k POWER GOOD 1 INPUT 1.8V TO 2.5V CSYS1* 100F CIN1 10F PGOOD1 PGOOD2 VCC R6B 100k POWER GOOD 2 N1/N2: Si 4922DY
N1 DRV1 R3A 27
MAX8737
N2 DRV2 R3B 33 C2B 0.22F CS1 CS2 R5B 150 OUT1 RCS2 20m CIN2 10F
INPUT 1.25V TO 1.5V CSYS2* 100F
1.5V 2A (MAX)
COUT1 10F
RCS1 20m
R4A 10
C2A 0.1F
1.05V 3A (MAX) COUT2 22F
R4B 10
R5A 340
OUT2 ON EN2 R1B 90k OFF
ON OFF R1A 33.2k SYSTEM REF (2.0V) R2A 100k
EN1
REFIN1 GND
REFIN2 R2B 100k
SYSTEM REF (2.0V)
* A LOCAL 10F CERAMIC CAPACITOR WILL BE SUFFICIENT FOR MOST APPLICATIONS. IF THE MAX8737 IS POWERED FROM A HIGH-IMPEDANCE SOURCE, ADDITIONAL LOW-ESR POLYMER CAPACITORS ARE RECOMMENDED ON THE INPUT.
NOTE: THE SYSTEM REFERENCE IS TYPICALLY GENERATED BY THE STEP-DOWN CONVERTER USED TO POWER THE DUAL LOW-VOLTAGE LINEAR REGULATORS.
Figure 1. Typical Operating Circuit with Current Limit
resistor network is calculated using the short-circuit current (ISHORT), the maximum load current (IMAX), current-sense resistor (RCS), the 10mV (3mV) currentlimit threshold (VILIM), and the external reference input (REFIN_). See Figure 3: 1) Pick the RCS requirement for maximum short-circuit current: RCS = VILIM / ISHORT 2) Select R1 = 10 and select R2 using the following formula:
R2 =
(VREFIN + VILIM )R1 IMAXRCS - VILIM
UVP Short-Circuit Protection
There are two levels of short-circuit UVP available in the controller. When the current-limit protection is not used (CS_= VCC), the output undervoltage timeout protection is enabled, which protects the regulator against short circuits. Output UVP timing depends on the magnitude of the output voltage drop. To clear the UVP fault latch, toggle the respective EN_ input, or cycle VCC below its UVLO threshold.
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737
INPUT 1.0V TO 5.5V CIN
N1
RCS COUT 4.7F/A R3 C2 OUTPUT
DRV
0.4V
OUT 10 RDSON
CS
EN
C1
MAX8737
CONTROL BLOCK ERROR AMPLIFIER REFIN R2
ILIM_EN
5V BIAS SUPPLY
VCC
CURRENT SENSE
R1 REF
OFF ON LOGIC SUPPLY R6 POWER GOOD
EN THERMAL SHDN DELAY LOGIC
PGOOD
88% ILIM_EN S Q R EN 60% 75s DELAY
80%
GND
THE MAX8737 INCLUDES TWO LDOs AS SHOWN ABOVE.
Figure 2. Functional Diagram
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737
INPUT INPUT
MAX8737
DRV R3
CIN
MAX8737
DRV R3 VOUT
CIN
VOUT C2 RCS R1 COUT
RCS C2
COUT
CS OUT
CS R2
OUT IMAX IMAX
10mV RCS
10mV RCS VOUT VOUT FOLDBACK CURRENT-LIMIT PROTECTION
SIMPLE CURRENT-LIMIT PROTECTION
Figure 3. Current-Limit Protection
Slow UVP If the output drops below 80% of the nominal output voltage (VREFIN) for 75s, the MAX8737 shuts down the LDO and pulls the DRV_ pin to ground. If the output voltage returns above 80% of the nominal output voltage (VREFIN) within the 75s, the controller ignores the load transient. Fast UVP If the output voltage drops below 60% of the nominal output voltage (V REFIN ) for approximately 5s, the MAX8737 immediately shuts down and pulls the DRV_ pin to ground. If the output voltage returns above 80% of the nominal output voltage (VREFIN) within the 5s, the controller ignores the load transient.
the external pass transistor, allowing the system to cool. The thermal sensor turns the pass transistor back on once the controller's junction temperature drops by approximately 20C.
Design Procedure
Input Capacitor Selection (CIN)
Typically, the MAX8737 is powered from the output of a step-down regulator, effectively providing a low-impedance source. A local 10F ceramic capacitor at VIN and a 1.0F ceramic capacitor at VBIAS should be sufficient for most applications. If the linear regulator is connected to a high-impedance input, low-ESR polymer capacitors are recommended on the input.
Thermal Protection
The MAX8737 is available in a thin QFN package to reduce the thermal impedance, and improve the thermal coupling between the controller and the external MOSFETs. When the controller's junction temperature exceeds TJ = +125C (max), a thermal sensor turns off
Output Capacitor Selection (COUT)
To maintain stability and provide good transient response, the MAX8737 requires 4.7F/A (4.7F minimum) of low ESR ceramic capacitor at the output. The regulator remains stable with capacitances higher than the minimum. When selecting the output capacitor to
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737
provide good transient response, the capacitor's ESR should be minimized: VOUT = IOUT x ESR where IOUT is the maximum peak-to-peak load current step, and VOUT is the transient output-voltage tolerance. Example: The example below is used to demonstrate the stability calculation for the application circuit in Figure 1. 1) Choose VOUT = 1.05V and IMAX = 3A and the minimum load can be determined from the foldback current-limit resistance: IMIN = VOUT 6mA R1 + R2
Regulator Compensation
The compensation network (R3_, C2_) is customizable and depends on load and MOSFET characteristics: * Use of ceramic output capacitors with low RESR to ensure stability and minimize ESR voltage drop at load step * Strength of the external n-channel MOSFET (gM), its forward transconductance (gFS), and the gate-tosource capacitance (CGS) * The driver transconductance (GMDRV) of the integrated circuit driver * Load current range (including the minimum load): IMIN to IMAX Recommended Procedure Use the CGS, gFS, ID from the chosen transistor data sheet and use the equation below to translate the measured gFS to gM for normal operation: 1) Determine the LDO transconductance using the MOSFET's forward transconductance (gFS), and the drain current (ID) used to test the selected MOSFET: I gM = gFS MAX ID 2) Calculate the compensation resistor based on the output capacitor (C OUT), the MOSFET's gate-tosource capacitance (CGS = CISS - CRSS), and the minimum driver transconductance: R3 = COUT CGSgM x 0.5S
2) For the selected MOSFET (Si4922DY), C GS = 2000pF at 1.5V, and gFS = 30S at ID = 8.8A: gM = 30S 3A = 17.5S 8.8A
3) The output capacitor must be at least 4.7F/A. Therefore the design must use a minimum 14.1F capacitor. The closest standard capacitor value is 22F. 4) Based on the above operating conditions and component selection, the compensation resistor value should be: R3 = 22F = 35 2nF x 17.5S x 0.5S
5) Finally, select the compensation capacitor value: C2 = 2 x 25mV x 22F 6mA x 1S x (35)2 = 0.15F
External MOSFET Selection
The MAX8737 uses an n-channel MOSFET as the series pass transistor instead of a p-channel MOSFET to reduce cost. The selected MOSFET must have a gate threshold voltage (at the required max load) that meets the following criteria: VGS _ MAX VCC - VOUT where VCC is the controller bias voltage, and VGS_MAX is the maximum gate voltage required to yield the onresistance (RDS_ON) specified by the manufacturer's data sheet. Make sure that input-to-output voltage meets the condition below to avoid entering dropout, where output voltage starts to decrease and any ripple on the input also passes through to the output. RDSON has a positive temperature coefficient (approximately
3) Calculate the compensation capacitance using the minimum load current (I MIN ) and compensation resistor value calculated above: C2 = where VT = 25mV. 2VTCOUT IMINGMDRV (R3)2
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs
0.5%/C); therefore, the value of RDSON at the highest operating junction temperature should be used: VIN _ MIN - VOUT _ MAX IMAX (RDSON _ MAX + RCS ) where VIN_MIN is the minimum input voltage at the drain of the MOSFET. MOSFET Power Dissipation The maximum power dissipation of the MAX8737 depends on the thermal resistance of the external nchannel MOSFET package, the board layout, the temperature difference between the die and ambient air, and the rate of airflow. The power dissipated in the MOSFET is: PDIS = IOUT(VIN - VCSP) The maximum allowable power dissipation is determined by the following formula: RDIS(MAX) = TJ(MAX) - TA JC + CA
PC Board Layout Guidelines
Due to the high-current paths and tight output accuracy required by most applications, careful PC board layout is required. An evaluation kit (MAX8737EVKIT) is available to speed design. It is important to keep all traces as short as possible to minimize the highcurrent trace dimensions to reduce the effect of undesirable parasitic inductance. The MOSFET dissipates a fair amount of heat due to the high currents involved, especially during large input-to-output voltage differences. To dissipate the heat generated by the MOSFET, make power traces very wide with a large amount of copper area. An efficient way to achieve good power dissipation on a surface-mount package is to lay out copper areas directly under the MOSFET package on multiple layers and connect the areas through vias. Use a ground plane to minimize impedance and inductance. In addition to the usual high-power considerations, here are four tips to ensure high output accuracy: * Ensure that the feedback connection to C OUT is short and direct. * Place the reference input resistors next to the REFIN_ pin. * Place RC and CC next to the DRV_ pin. * Ensure REFIN_ and DRV_ traces are away from noisy sources to ensure tight accuracy.
MAX8737
where TJ(MAX) is the maximum junction temperature (+150C), TA is the ambient temperature, JC is the thermal resistance from the die junction to the package case, and CA is the thermal resistance from the case through the PC board, copper traces, and other materials to the surrounding air. Standard 8-pin SO MOSFETs are typically rated for 2W, while new power packages (PowerPAKTM, DirectFETTM, etc.) can achieve power dissipation ratings as high as 5W. For optimum power dissipation, use a large ground plane with good thermal contact to ground and use wide input and output traces. Extra copper on the PC board increases thermal mass and reduces the thermal resistance of the board. See Figure 4.
PowerPAK is a registered trademark of Vishay Siliconix. DirectFET is a trademark of International Rectifier Corp.
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13
Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737
N1/N2: Si 4922DY 5V BIAS SUPPLY C1 1.0F R6A 100k POWER GOOD 1 INPUT 1.8V TO 2.5V CSYS1* 100F CIN1 10F N1 R3A 27 COUT1 10F C2A 0.1F DRV1 CS1 VCC CS2 R6B 100k PGOOD2 POWER GOOD 2 INPUT 1.25V TO 1.5V CSYS2* 100F *A LOCAL 10F CERAMIC CAPACITOR IS SUFFICIENT FOR MOST APPLICATIONS. IF THE MAX8737 IS POWERED FROM A HIGH-IMPEDANCE SOURCE, ADDITIONAL LOW-ESR POLYMER CAPACITORS ARE RECOMMENDED ON THE INPUT.
PGOOD1
MAX8737
N2 DRV2 R3B 33 C2B 0.22F COUT2 22F CIN2 10F
1.5V 2A (MAX)
1.05V 3A (MAX)
OUT1 ON OFF R7 47.5k SYSTEM REF (2.0V) R8 42.2k REFIN2 R9 100k REFIN1 EN1
OUT2 ON EN2 OFF
GND
NOTE: THE SYSTEM REFERENCE IS TYPICALLY GENERATED BY THE STEP-DOWN CONVERTER USED TO POWER THE DUAL LOW-VOLTAGE LINEAR REGULATORS.
Figure 4. Typical Operating Circuit with Output Undervoltage Protection
Chip Information
TRANSISTOR COUNT: 1562 PROCESS: BiCMOS
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Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
24L QFN THIN.EPS
MAX8737
PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
21-0139
D
1
2
PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
21-0139
D
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.

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